G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
10/2013
10/29/2013	US8572424 Semiconductor device to select and output data to a data bus
10/29/2013	US8572411 Systems and methods for secure transaction management and electronic rights protection
10/29/2013	US8572386 Secure device, information processing terminal, integrated circuit, terminal application generation apparatus, application authentication method
10/29/2013	US8572353 Condensed router headers with low latency output port calculation
10/29/2013	US8572351 Memory device with serial protocol and corresponding method of addressing
10/29/2013	US8572349 Processor with programmable configuration of logical-to-physical address translation on a per-client basis
10/29/2013	US8572348 Method of establishing hard disk physical partition
10/29/2013	US8572343 Synchronous extent migration protocol for paired storage
10/29/2013	US8572338 Systems and methods for creating space-saving snapshots
10/29/2013	US8572337 Systems and methods for performing live backups
10/29/2013	US8572336 Storage control apparatus and storage control apparatus memory control method
10/29/2013	US8572334 System and method for locking portions of a memory card
10/29/2013	US8572333 Non-volatile memory with extended operating temperature range
10/29/2013	US8572331 Method for reliably updating a data group in a read-before-write data replication environment using a comparison file
10/29/2013	US8572330 Systems and methods for granular resource management in a storage network
10/29/2013	US8572328 Method and system for memory management
10/29/2013	US8572322 Asynchronously scheduling memory access requests
10/29/2013	US8572321 Apparatus and method for segmented cache utilization
10/29/2013	US8572320 Memory devices and systems including cache devices for memory modules
10/29/2013	US8572317 Memory device and method to generate resume data for a media file that is interrupted while being reproduced
10/29/2013	US8572307 Memory controller, memory card, and nonvolatile memory system
10/29/2013	US8572306 USB transaction translator and USB transaction translation method
10/29/2013	US8572305 Apparatus and method for configuring a bus system
10/29/2013	US8572304 Systems and methods for configuring mobile devices for printing to wireless printers
10/29/2013	US8572303 Portable universal communication device
10/29/2013	US8572302 Controller for storage device with improved burst efficiency
10/29/2013	US8572298 Architecture to connect circuitry between customizable and predefined logic areas
10/29/2013	US8572297 Programmable system-on-chip hub
10/29/2013	US8572296 Device and method for arbitrating between direct memory access task requests
10/29/2013	US8572291 Electronic board and system comprising a plurality of such boards
10/29/2013	US8572266 Group management and graphical user interface for associated electronic devices
10/29/2013	US8572264 Systems and methods for state awareness across communication channels and statefully transitioning between communication channels
10/29/2013	US8572210 Shared content delivery infrastructure and method of generating a web page
10/29/2013	US8572208 Shared content delivery infrastructure
10/29/2013	US8571936 Dynamic integration and non-linear presentation of advertising content and media content
10/29/2013	US8571755 Distributed vehicle event recorder systems having a portable memory data transfer system
10/29/2013	US8570555 Image forming apparatus with an identification control unit having an identification signal line, a data line, and a period signal line
10/29/2013	US8570335 Mobile device and method for displaying thumbnails on the mobile device
10/24/2013	WO2013158953A1 Managing operational state data in memory module
10/24/2013	WO2013158817A1 Lun management with distributed raid controllers
10/24/2013	WO2013158106A1 Unequalized clock data recovery for serial i/o receiver
10/24/2013	WO2013157588A1 Information processing device, information processing method, and program
10/24/2013	WO2013157582A1 Design assistance device, design assistance method and program
10/24/2013	WO2013157094A1 Management system and management method
10/24/2013	WO2013157093A1 System for supporting generation of operating task processes for computer system
10/24/2013	WO2013157084A1 Trace information acquisition device and method
10/24/2013	WO2013157042A1 Distributed application and data hosting system
10/24/2013	WO2013155802A1 Wireless communication terminal
10/24/2013	WO2013121085A3 Method, apparatus, and computer program product for inter-core communication in multi-core processors
10/24/2013	WO2013112118A3 Instructions to perform jh cryptographic hashing in a 256 bit data path
10/24/2013	WO2013111019A3 Systems and methods for dynamic priority control
10/24/2013	US20130283264 Method for selective replication of physical devices on a virtual self-configuring zoning expander
10/24/2013	US20130283164 System for Controlling Association of Microphone and Speakers
10/24/2013	US20130283012 Methods and Apparatus for Scalable Array Processor Interrupt Detection and Response
10/24/2013	US20130282991 Method and system for improving serial port memory communication latency and reliability
10/24/2013	US20130282971 Computing system and data transmission method
10/24/2013	US20130282949 Access to internal memory of a computing device
10/24/2013	US20130282948 System and method for system wide self-managing storage operations
10/24/2013	US20130282947 Interface switching control methods, and portable terminals and portable mobile devices using the same
10/24/2013	US20130282946 Controller area network bus
10/24/2013	US20130282945 Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory
10/24/2013	US20130282944 Sas integration with tray and midplane server architecture
10/24/2013	US20130282943 Apparatus and methods for a tamper resistant bus for secure lock bit transfer
10/24/2013	US20130282942 Input Output Bridging
10/24/2013	US20130282941 Network communications apparatus, system, and method
10/24/2013	US20130282940 Method for matching the signal transmission between two electronic devices, and arrangement having a computer system and a peripheral device
10/24/2013	US20130282939 Method and apparatuses for monitoring system bus
10/24/2013	US20130282938 Extensible WSE Hub to Support a Multi-Hop Tree of USB Hubs or Peripherals over a Wireless Link
10/24/2013	US20130282937 Portable communication devices with accessory functions and related methods
10/24/2013	US20130282936 Universal interface for one or more sensors
10/24/2013	US20130282934 Methods and Systems for Protecting Data in USB Systems
10/24/2013	US20130282933 Direct memory access buffer utilization
10/24/2013	US20130282930 Metadata retrieval for multi-function devices
10/24/2013	US20130282928 Wireless adapter for connecting a computing device directly to a non-master peripheral device with legacy interface and method of use
10/24/2013	US20130282926 Data transferring apparatus and method for inter-integrated circuit interface
10/24/2013	US20130281153 Information system with detachable information module
10/24/2013	US20130279278 Memory Component with Terminated and Unterminated Signaling Inputs
10/24/2013	US20130278614 Information Handling System Display Adaptive Self-Refresh
10/24/2013	US20130278613 Secondary graphics processor control system
10/24/2013	US20130278290 Programmable high-speed i/o interface
10/24/2013	DE112011104733T5 Informationsverarbeitungssystem und Informationsverarbeitungsvorrichtung Information processing system and information processing apparatus
10/24/2013	DE112011104491T5 Pufferverwaltungsschema für einen Netzwerkprozessor Buffer management scheme for a network processor
10/24/2013	DE10353950C5 Steuerungssystem Control system
10/24/2013	DE102013205973A1 Realisieren von Leistungsoptimierung bei Speicheradaptern durch zusammengefasstes Ausführen von Hardware-Operationen Realization of performance optimization for memory adapters by pooled run hardware operations
10/24/2013	DE102013103391A1 Betriebsverfahren eines Controllers, der eine nichtflüchtige Speichervorrichtung steuert, und Mappingmuster-Auswahlverfahren zum Auswählen eines Mappingmusters, das ein polar codiertes Codewort Multibitdaten einer nichtflüchtigen Speichervorrichtung zuordnet Method of operation of a controller which controls a non-volatile memory device, and mapping pattern selection method for selecting a mapping pattern that maps a polar multi-bit encoded code word of a non-volatile memory device
10/24/2013	DE102013006678A1 Data input device e.g. keyboard, for tablet computer, has input elements whose host connection keys cause communication module to discover computing devices that are accessible over wireless connection
10/24/2013	DE102012206390A1 Steuereinrichtung mit Signalzusammenfassung Control device with signal Summary
10/24/2013	DE102012103545A1 Einrichtung für eine gesteuerte technische Anlage und Verfahren zur Identifikation einer Einrichtung für eine gesteuerte technische Anlage Means for controlled technical system and method for identifying a device for controlled technical system
10/23/2013	EP2654243A1 Method and device for updating port index, and multi-device system
10/23/2013	EP2654223A1 Data transmission device and data transmission control device
10/23/2013	EP2653976A1 Electronic system with a Mini-DisplayPort
10/23/2013	EP2653975A2 Sensor module
10/23/2013	EP2653974A2 System for converting a signal
10/23/2013	EP2652906A2 Network stimulation engine
10/23/2013	EP2652636A1 Split traffic routing in a distributed shared memory multiprocessor
10/23/2013	EP2652629A1 Method and apparatus for 3d capture syncronization
10/23/2013	EP2652628A1 Device for multiple ethernet connection to a computer unit and computer unit assembly and equipment linked together
10/23/2013	EP2652627A1 Input interface for a transmit/receive station and station comprising same
10/23/2013	EP2652589A1 Storage system
10/23/2013	CN203250312U Extensible common core processing daughter board with interferences

1 ... 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 ... 1581