Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
11/2005
11/01/2005US6961935 Multi-processor system executing a plurality of threads simultaneously and an execution method therefor
11/01/2005US6961890 Dynamic variable-length error correction code
11/01/2005US6961863 Techniques for facilitating conversion between asynchronous and synchronous domains
11/01/2005US6961855 Notification of modifications to a trusted computing base
11/01/2005US6961843 Method frame storage using multiple memory circuits
11/01/2005US6961840 Method and apparatus for managing a dynamic alias page table
11/01/2005US6961839 Generation of native code to enable page table access
11/01/2005US6961838 Generating updated virtual disks using distributed mapping tables accessible by mapping agents and managed by a centralized controller
11/01/2005US6961837 Method and apparatus for address translation pre-fetch
11/01/2005US6961836 Method and apparatus for mapping storage partitions of storage elements to host systems
11/01/2005US6961835 System and method for autonomically reallocating memory among buffer pools
11/01/2005US6961834 Method and apparatus for scheduling of requests to dynamic random access memory device
11/01/2005US6961831 Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules
11/01/2005US6961828 Cluster system, memory access control method, and recording medium
11/01/2005US6961827 Victim invalidation
11/01/2005US6961825 Cache coherency mechanism using arbitration masks
11/01/2005US6961824 Deterministic setting of replacement policy in a cache
11/01/2005US6961823 Stream-down prefetching cache
11/01/2005US6961822 Free memory manager scheme and cache
11/01/2005US6961821 Reconfigurable cache controller for nonuniform memory access computer systems
11/01/2005US6961820 System and method for identifying and accessing streaming data in a locked portion of a cache
11/01/2005US6961819 Method and apparatus for redirection of operations between interfaces
11/01/2005US6961818 Method, system and computer program product for managing data in a mirrored cache using an access balancing technique
11/01/2005US6961817 Volume management method and apparatus
11/01/2005US6961816 Disk array device with selectable method for generating redundant data
11/01/2005US6961814 Disk drive maintaining a cache link attribute for each of a plurality of allocation states
11/01/2005US6961813 System and method for providing multi-initiator capability to an ATA drive
11/01/2005US6961811 Apparatus and method to maintain information by assigning one or more storage attributes to each of a plurality of logical volumes
11/01/2005US6961809 Managing a position-dependent data set that is stored in a content addressable memory array at a network node
11/01/2005US6961808 Method and apparatus for implementing and using multiple virtual portions of physical associative memories
11/01/2005US6961807 Device, system and method for an integrated circuit adaptable for use in computing systems of differing memory requirements
11/01/2005US6961806 System and method for detecting access to shared structures and for maintaining coherence of derived structures in virtualized multiprocessor systems
11/01/2005US6961804 Flexible techniques for associating cache memories with processors and main memory
11/01/2005US6961796 Extendable bus interface
11/01/2005US6961788 Disk control device and control method therefor
11/01/2005US6961747 Information servicing method, recording medium recording with programs for realizing the method, and information servicing system
11/01/2005US6961740 Method and system for multimode garbage collection
11/01/2005US6961681 System and method providing virtual applications architecture
11/01/2005US6961464 Method for creating a database such as a dictionary used for a word conversion system
11/01/2005US6961281 Single rank memory module for use in a two-rank memory module system
11/01/2005US6961280 Techniques for implementing address recycling in memory circuits
11/01/2005CA2284681C Transmission and reception of television programmes and other data
10/2005
10/30/2005CA2507424A1 Maintaining time-date information for syncing low fidelity devices
10/30/2005CA2501755A1 Method and system for limiting software updates
10/27/2005WO2005101721A1 Method and apparatus for preventing network attacks by authenticating internet control message protocol packets
10/27/2005WO2005101720A2 Method and system for distinguishing network threats from false positives
10/27/2005WO2005101423A1 Sector protection circuit and sector protection method for non-volatile semiconductor storage device, and non-volatile semiconductor storage device
10/27/2005WO2005101248A1 Binary search tree with hooked duplicates for memory allocation
10/27/2005WO2005101219A1 Memory controller and semiconductor device
10/27/2005WO2005101215A1 Terminal device and copyright protection system
10/27/2005WO2005101214A1 Transaction system
10/27/2005WO2005101213A2 Cached memory system and cache controller for embedded digital signal processor
10/27/2005WO2005101212A2 System, apparatus, and method for content management
10/27/2005WO2005101211A1 Compound storage, data writing method and program
10/27/2005WO2005101210A1 Data analysis device, data analysis method, data analysis program, and recording medium containing the data analysis program
10/27/2005WO2005101209A1 Backup method and backup system
10/27/2005WO2005101206A2 Peer-to-peer distributed computational system and method
10/27/2005WO2005101182A2 Integrated circuit capable of pre-fetching data
10/27/2005WO2005101160A1 Method and device for controlling an access to peripherals
10/27/2005WO2005099375A2 System and method for placement of rdma payload into application memory of a processor system
10/27/2005WO2005076917A3 Methods and apparatuses for certifying electronic messages
10/27/2005WO2005020080A3 Cache bank interface unit
10/27/2005WO2004099997A9 Invalidating storage, clearing buffer entries
10/27/2005US20050241005 Data processing apparatus and method for operating a dual rail circuit component
10/27/2005US20050241001 Consumable resource access control
10/27/2005US20050241000 Security hole diagnostic system
10/27/2005US20050240999 Method and system for adaptive rule-based content scanners for desktop computers
10/27/2005US20050240997 ID collection and management apparatus, method and program of computer
10/27/2005US20050240986 Method and apparatus for configuration management of computer system
10/27/2005US20050240985 Policy engine and methods and systems for protecting data
10/27/2005US20050240984 Code assist for non-free-form programming
10/27/2005US20050240983 Adjusting depiction of user interface based upon state
10/27/2005US20050240930 Parallel processing computer
10/27/2005US20050240854 Storage system
10/27/2005US20050240850 Multicore processor test method
10/27/2005US20050240823 Software correction
10/27/2005US20050240813 Restore method for backup
10/27/2005US20050240809 Configuring cache memory from a storage controller
10/27/2005US20050240806 Diagnostic memory dump method in a redundant processor
10/27/2005US20050240803 Storage system, storage device, and remote copy method
10/27/2005US20050240800 Computer system, control apparatus, storage system and computer device
10/27/2005US20050240773 Secure file sharing
10/27/2005US20050240771 Trusted and secure techniques, systems and methods for item delivery and execution
10/27/2005US20050240752 Thread changeover control apparatus
10/27/2005US20050240751 Virtual translation lookaside buffer
10/27/2005US20050240750 Interleaved mapping method and apparatus for accessing memory
10/27/2005US20050240749 Secure storage of data in a network
10/27/2005US20050240748 Locality-aware interface for kernal dynamic memory
10/27/2005US20050240747 Memory leak detection
10/27/2005US20050240746 Process and apparatus for memory mapping
10/27/2005US20050240745 High speed memory control and I/O processor system
10/27/2005US20050240743 Method and apparatus for accessing data storage systems
10/27/2005US20050240742 Method and apparatus for improving performance of data storage systems
10/27/2005US20050240741 Subsystem replacement method
10/27/2005US20050240740 Data processing system
10/27/2005US20050240739 Memory devices signaling task completion and interfaces and software and methods for controlling the same
10/27/2005US20050240738 Storage apparatus
10/27/2005US20050240737 Modified computer architecture
10/27/2005US20050240736 System and method for coherency filtering
10/27/2005US20050240735 Location-aware cache-to-cache transfers
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