Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
12/2005
12/29/2005US20050285871 Image-processing circuit, electronic apparatus, and method for processing image
12/29/2005DE102005028207A1 Informationsverwaltungsverfahren, Informationswiedergabevorrichtung und Informationsverwaltungsvorrichtung Information management method, information reproducing apparatus and information management device
12/29/2005DE102005026448A1 Informationsverarbeitungssystem und -verfahren, Informationsübertragungs-Verarbeitungsvorrichtung und Informationsempfangs-Verarbeitungsvorrichtung Information processing system and method, information transfer processing device and information processing device receiving
12/29/2005DE102005022687A1 Semiconductor memory system has dynamic RAM (DRAM) that generates mirror mode control signal in response to chip reset signal and one of non-shared command signal received from memory controller, to operate DRAM in normal or mirror modes
12/29/2005DE102005014727A1 Hardwarekoordination von Power Management-Aktivitäten Coordination of hardware power management activities
12/29/2005DE102005014462A1 Starten eines sicheren Kernels in einem Multiprozessorsystem Start of a secure kernel in a multiprocessor system
12/29/2005DE102005010931A1 Mehrtordirektzugriffsspeicher Mehrtordirektzugriffsspeicher
12/29/2005DE102005003644A1 Fahrzeugsteuersystem und Fahrzeugsteuergerät und hierzu verwendete Mobileinrichtung Vehicle control system and vehicle controller and mobile equipment used for this purpose
12/29/2005DE102004037092A1 WORM-Garantie-Speichervorrichtung WORM guarantee memory device
12/29/2005DE102004027372A1 DPA-resistente konfigurierbare Logikschaltung DPA-resistant configurable logic circuit
12/29/2005DE10008974B4 Signaturverfahren Signature schemes
12/29/2005CA2570556A1 System and method for maintaining objects in a lookup cache
12/29/2005CA2563255A1 Elevator electronic safety system
12/29/2005CA2536127A1 Drive device
12/28/2005EP1610550A1 Moving picture processing device, information processing device, and program thereof
12/28/2005EP1610549A1 Moving picture processing device, information processing device, and program thereof
12/28/2005EP1610467A1 Efficient address generation for Forney's modular periodic interleavers
12/28/2005EP1610344A1 Product and method preventing incorrect storage of data in case of power-down
12/28/2005EP1610272A1 Buffer protection in a portable security module
12/28/2005EP1610227A1 Reconfigurable processor with configuration cache and semiconductor device
12/28/2005EP1610223A2 System for downloading contents data, method and mobile communication terminal used for the same
12/28/2005EP1609095A1 Structured indexes on results of function applications over data
12/28/2005EP1609071A2 Data storage system
12/28/2005EP1609070A1 Security system and method for computer operating systems
12/28/2005EP1609069A2 Nodma cache
12/28/2005EP1609067A1 Memory management in a data processing system
12/28/2005EP1609064A1 Method for evaluating a profile for risk and/or reward
12/28/2005EP1581875A3 Using direct memory access for performing database operations between two or more machines
12/28/2005EP1532636A4 Transparent ecc memory system
12/28/2005EP1402366B1 Method and system for providing an interleaved backup
12/28/2005EP1320972B1 Network server
12/28/2005EP1084465B1 Method for secured access to data in a network
12/28/2005EP0976035A4 Information appliance architecture
12/28/2005EP0920435B1 Random access memory device and platinum chemical vapour deposition process used in its preparation
12/28/2005EP0860017B1 Loosely coupled mass storage computer cluster
12/28/2005EP0853790B1 Method of storing data in a flash eeprom main memory in a computer system
12/28/2005CN1714448A Electronic memory component with protection against light attack
12/28/2005CN1714401A SDRAM address mapping optimized for two-dimensional access
12/28/2005CN1714356A Method and system for performing digital authorization management by standard indication engine
12/28/2005CN1714347A Selectively changeable line width memory
12/28/2005CN1714337A Microcontroller and assigned method for processing the programming of the microcontroller
12/28/2005CN1714330A Circuit arrangement with non-volatile memory module and method of en-/decrypting data in the non-volatile memory module
12/28/2005CN1714327A Security maturity assessment method.
12/28/2005CN1713564A Contents data utilization system and method, and mobile communication terminal used for the same
12/28/2005CN1713197A Verifying human interaction to a computer entity by way of atrusted component on a computing device or the like
12/28/2005CN1713163A Memory control apparatus and method for scheduling commands
12/28/2005CN1713160A Method of writing data into flash memory
12/28/2005CN1713159A Software to erase a non-volatile storage device
12/28/2005CN1713151A Method and system for facilitating communication within shared memory environments using lock-free queues
12/28/2005CN1713137A Digital data processing apparatus having multi-level register file
12/28/2005CN1713135A Processor and semiconductor device
12/28/2005CN1234081C Method for realizing computer safety and enciphering based on identity confirmation by using BIOS
12/28/2005CN1234079C High-speed information safety processor
12/28/2005CN1234078C Code signature verifying method of ELF file form
12/28/2005CN1234077C Method for loading operating system
12/28/2005CN1234076C Object management system and method
12/28/2005CN1234075C Method for quickening memory data innovation and raising network data transmission efficiency and its circuit
12/28/2005CN1234074C Mirror method for files based on Internet
12/28/2005CN1234071C Method and device for reliable fault transferring non-complete RAID disc writing
12/27/2005US6981179 Microcomputer having built-in nonvolatile memory and check system thereof and IC card packing microcomputer having built-in nonvolatile memory and check system thereof
12/27/2005US6981177 Method and system for disaster recovery
12/27/2005US6981175 Memory and method for employing a checksum for addresses of replaced storage elements
12/27/2005US6981162 Suspend-to-RAM controlling circuit
12/27/2005US6981159 Memory control device having less power consumption for backup
12/27/2005US6981155 System and method for computer security
12/27/2005US6981151 Digital data storage systems, computers, and data verification methods
12/27/2005US6981149 Secure, easy and/or irreversible customization of cryptographic device
12/27/2005US6981145 Device and process for remote authentication of a user
12/27/2005US6981126 Continuous interleave burst access
12/27/2005US6981125 Method and apparatus for managing shared virtual storage in an information handling system
12/27/2005US6981123 Device-managed host buffer
12/27/2005US6981122 Method and system for providing a contiguous memory address space
12/27/2005US6981121 Method for aligning stored data
12/27/2005US6981120 Method and apparatus for virtual memory segmentation
12/27/2005US6981119 System and method for storing performance-enhancing data in memory space freed by data compression
12/27/2005US6981118 Storage control system
12/27/2005US6981117 Method, system, and program for transferring data
12/27/2005US6981116 System and method for information control block tracking streams for universal disk format file systems
12/27/2005US6981115 Method of data backup in a computer system and a storage system therefor
12/27/2005US6981114 Snapshot reconstruction from an existing snapshot and one or more modification logs
12/27/2005US6981113 Storage registers for a processor pipeline
12/27/2005US6981112 Dynamic cache disable
12/27/2005US6981111 Data storage system
12/27/2005US6981110 Hardware enforced virtual sequentiality
12/27/2005US6981109 Digital signal processor system having programmable random access memory that executes processing during downloading of a program
12/27/2005US6981108 Method for locking shared resources connected by a PCI bus
12/27/2005US6981106 System and method for accelerating ownership within a directory-based memory system
12/27/2005US6981105 Method and apparatus for invalidating data in a cache
12/27/2005US6981104 Method for conducting checkpointing within a writeback cache
12/27/2005US6981103 Cache memory control apparatus and processor
12/27/2005US6981102 Method and system for managing meta data
12/27/2005US6981101 Method and system for maintaining data at input/output (I/O) interfaces for a multiprocessor system
12/27/2005US6981099 Smart-prefetch
12/27/2005US6981098 Methods and apparatus for coordinating a plurality of updates to a cache
12/27/2005US6981097 Token based cache-coherence protocol
12/27/2005US6981096 Mapping and logic for combining L1 and L2 directories and/or arrays
12/27/2005US6981094 Storage system having a plurality of interfaces
12/27/2005US6981093 Storage system including a storage control apparatus which controls operation of the system based on control information stored in shared memory
12/27/2005US6981092 Automatic media readying system and method
12/27/2005US6981091 Using transfer bits during data transfer from non-volatile to volatile memories
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