| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 08/15/2006 | US7092976 Parallel high speed backup for a storage area network (SAN) file system |
| 08/15/2006 | US7092973 Conflict detection in a distributed system landscape |
| 08/15/2006 | US7092972 Delta transfers in distributed file systems |
| 08/15/2006 | US7092971 Prefetch appliance server |
| 08/15/2006 | US7092969 Management of source and derivative image data |
| 08/15/2006 | US7092961 Data map forming system and method of forming a data map based on evaluation values |
| 08/15/2006 | US7092950 Method for generic object oriented description of structured data (GDL) |
| 08/15/2006 | US7092949 Recording medium having a plurality of sections storing root directory information |
| 08/15/2006 | US7092944 Personal information management apparatus, personal information managing method, and storage medium and program therefor |
| 08/15/2006 | US7092942 Managing secure resources in web resources that are accessed by multiple portals |
| 08/15/2006 | US7092911 Reproducing apparatus and reproducing method |
| 08/15/2006 | US7092910 Method, apparatus, and system for processing information by attaching information to digital data, and storage medium storing computer-readable program codes to carry out the method |
| 08/15/2006 | US7092890 Method for manufacturing thin GaAs die with copper-back metal structures |
| 08/15/2006 | US7092523 Method and apparatus for minimizing differential power attacks on processors |
| 08/15/2006 | US7092400 Method of transmitting data through a data bus |
| 08/15/2006 | US7091993 Computer-implemented digital video object compositing |
| 08/15/2006 | US7091980 System and method for communicating digital display data and auxiliary processing data within a computer graphics system |
| 08/15/2006 | US7091743 Data acknowledgment using impedance mismatching |
| 08/15/2006 | US7091740 Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory |
| 08/15/2006 | CA2381162C Data processing device having protected memory and corresponding method |
| 08/15/2006 | CA2221874C Shared memory computer networks |
| 08/10/2006 | WO2006082990A1 Methods and apparatus for secure processor collaboration in a multi-processor system |
| 08/10/2006 | WO2006082923A1 Parallel interleaver, parallel deinterleaver, and interleave method |
| 08/10/2006 | WO2006082554A2 Data processing system comprising a cache unit |
| 08/10/2006 | WO2006082551A1 Data processing system and method of cache replacement |
| 08/10/2006 | WO2006030421A3 Emulating small block size of flash memory |
| 08/10/2006 | WO2003038620A3 Data storage method with error correction |
| 08/10/2006 | US20060179485 Intrusion handling system and method for a packet network with dynamic network address utilization |
| 08/10/2006 | US20060179484 Remediating effects of an undesired application |
| 08/10/2006 | US20060179483 Method and system for validating a computer system |
| 08/10/2006 | US20060179482 Security critical data containers |
| 08/10/2006 | US20060179360 Reasonable clock adjustment for storage system |
| 08/10/2006 | US20060179328 Storage device with separable data protection and method thereof |
| 08/10/2006 | US20060179327 Method and apparatus for managing encrypted data on a computer readable medium |
| 08/10/2006 | US20060179326 Security device using multiple operating system for enforcing security domain |
| 08/10/2006 | US20060179325 Secure computer data storage method and device |
| 08/10/2006 | US20060179324 Methods and apparatus for facilitating a secure session between a processor and an external device |
| 08/10/2006 | US20060179315 System and method for preventing fraud of certification information, and recording medium storing program for preventing fraud of certification information |
| 08/10/2006 | US20060179298 VPN Enrollment Protocol Gateway |
| 08/10/2006 | US20060179287 Apparatus for controlling multi-word stack operations in digital data processors |
| 08/10/2006 | US20060179266 System and method for generating effective address |
| 08/10/2006 | US20060179265 Systems and methods for executing x-form instructions |
| 08/10/2006 | US20060179264 Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream |
| 08/10/2006 | US20060179263 Flash memory device and associated data merge method |
| 08/10/2006 | US20060179261 Writable read-only snapshots |
| 08/10/2006 | US20060179259 Data Processing apparatus and method for controlling access to memory |
| 08/10/2006 | US20060179258 Method for detecting address match in a deeply pipelined processor design |
| 08/10/2006 | US20060179257 Apparatus and method for providing multiple reads/writes using a 2read/2write register file array |
| 08/10/2006 | US20060179250 Data processing system and method for efficient L3 cache directory management |
| 08/10/2006 | US20060179242 Data processing system and method for handling castout collisions |
| 08/10/2006 | US20060179239 Data stream prefetching in a microprocessor |
| 08/10/2006 | US20060179237 Method and apparatus for performing data prefetch in a multiprocessor system |
| 08/10/2006 | US20060179236 System and method to improve hardware pre-fetching using translation hints |
| 08/10/2006 | US20060179235 Cache mechanism and method for avoiding cast out on bad victim select and recycling victim select operation |
| 08/10/2006 | US20060179234 Cache member protection with partial make MRU allocation |
| 08/10/2006 | US20060179233 Method, system, and computer program product for implementing a dual-addressable cache |
| 08/10/2006 | US20060179232 Pipelining D states for MRU steerage during MRU/LRU member allocation |
| 08/10/2006 | US20060179231 System having cache memory and method of accessing |
| 08/10/2006 | US20060179230 Half-good mode for large L2 cache array topology with different latency domains |
| 08/10/2006 | US20060179229 L2 cache controller with slice directory and unified cache structure |
| 08/10/2006 | US20060179228 System for restricted cache access during data transfers and method thereof |
| 08/10/2006 | US20060179227 Mechanism and apparatus allowing an N-way set associative cache, implementing a hybrid pseudo-LRU replacement algorithm, to have N L1 miss fetch requests simultaneously inflight regardless of their congruence class |
| 08/10/2006 | US20060179226 System and method of re-ordering store operations within a processor |
| 08/10/2006 | US20060179225 Reducing cache trashing of certain pieces |
| 08/10/2006 | US20060179224 Method and system for increasing server capacity |
| 08/10/2006 | US20060179223 L2 cache array topology for large cache with different latency domains |
| 08/10/2006 | US20060179222 System bus structure for large L2 cache array topology with different latency domains |
| 08/10/2006 | US20060179221 System and method for tracking changes in L1 data cache directory |
| 08/10/2006 | US20060179220 Method and apparatus for adjusting performance of logical volume copy destination |
| 08/10/2006 | US20060179219 Configuration definition setup method for disk array apparatus, and disk array apparatus |
| 08/10/2006 | US20060179218 Method, apparatus and program storage device for providing geographically isolated failover using instant RAID swapping in mirrored virtual disks |
| 08/10/2006 | US20060179217 Apparatus and method for detecting disk write omissions |
| 08/10/2006 | US20060179216 Storage medium array controller, a storage medium array apparatus, a storage medium drive, a method of controlling a storage medium array, and a signal-bearing medium embodying a program of a storage medium array controller |
| 08/10/2006 | US20060179215 Apparatus for detecting disk write omissions |
| 08/10/2006 | US20060179213 Executing background writes to idle DIMMs |
| 08/10/2006 | US20060179212 Flash memory control devices that support multiple memory mapping schemes and methods of operating same |
| 08/10/2006 | US20060179211 Power Failure Detection And Correction In A Flash Memory Device |
| 08/10/2006 | US20060179210 Flash memory data structure, a flash memory manager and a flash memory containing the data structure |
| 08/10/2006 | US20060179209 Storage device method and apparatus |
| 08/10/2006 | US20060179208 System and method for memory hub-based expansion bus |
| 08/10/2006 | US20060179207 Processor instruction retry recovery |
| 08/10/2006 | US20060179206 Programmable bank/timer address folding in memory devices |
| 08/10/2006 | US20060179205 [expandable integrated circuit and operation procedure thereof] |
| 08/10/2006 | US20060179122 Storage system, backup system, and backup method |
| 08/10/2006 | US20060179083 Systems and methods for storing, backing up and recovering computer data files |
| 08/10/2006 | US20060178997 Systems and methods for authoring and protecting digital property |
| 08/10/2006 | US20060176600 Water marking in a data interval gap |
| 08/10/2006 | DE19956525B4 Computersystem und Verfahren zum Vorbereiten eines computerlesbaren Mediums Computer system and method for preparing a computer-readable medium |
| 08/10/2006 | DE112004001608T5 Mikro-TLB und Mikro-Etiketten für das Verringern der Leistungsaufnahme in einem Prozessor Micro-TLB and micro-labels for reducing power consumption in a processor |
| 08/10/2006 | DE102006002444A1 Verfahren und System für eine Cache-Nutzung durch ein Vorabrufen für mehrere DMA-Lesevorgänge A method and system for use by a cache for prefetching a plurality of DMA read operations |
| 08/10/2006 | DE102005005125A1 Data interface supplying method, involves modelling data interface to be protected by graphical notation, and defining direct connection between external module and data interface to be protected by graphical notation |
| 08/10/2006 | DE102005004902A1 Verfahren zur Anmeldung eines Nutzers an einem Computersystem A method for registration of a user to a computer system |
| 08/10/2006 | DE10045410B4 Burst-Transfer-Ausrichtverfahren für ein Datenverarbeitungssystem Burst transfer-aligning method for a data processing system |
| 08/09/2006 | EP1689195A2 Picture memory mapping to minimize memory bandwidth in compression and decompression of image sequences |
| 08/09/2006 | EP1688843A1 Authentication system |
| 08/09/2006 | EP1687725A1 Secure payment system |
| 08/09/2006 | EP1687724A2 Adaptive file readahead technique for multiple read streams |
| 08/09/2006 | EP1687723A2 System and method for operating dual bank read-while-write flash |
| 08/09/2006 | EP1559014A4 System and method for generating reports for a versioned database |
| 08/09/2006 | EP1299884B1 Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible |