Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
07/2014
07/22/2014US8788788 Logical sector mapping in a flash storage array
07/22/2014US8788787 Systems, methods and architecture for facilitating software access to acceleration technology
07/22/2014US8788786 Storage system creating cache and logical volume areas in flash memory
07/22/2014US8788785 Systems and methods for preventing heap-spray attacks
07/22/2014US8788784 Method and device for storing and reading/writing composite document
07/22/2014US8788783 Dynamically tuning the size of a cache stored in a shared memory
07/22/2014US8788782 Apparatus and method for memory management and efficient data processing
07/22/2014US8788781 Descriptor scheduler
07/22/2014US8788780 Signal restoration circuit, latency adjustment circuit, memory controller, processor, computer, signal restoration method, and latency adjustment method
07/22/2014US8788779 Non-volatile storage subsystem with energy-based performance throttling
07/22/2014US8788778 Garbage collection based on the inactivity level of stored data
07/22/2014US8788777 Memory on-demand, managing power in memory
07/22/2014US8788776 Hard disk control method, hard disk control device and computer
07/22/2014US8788775 Memory access control using redundant and non-redundant encoding
07/22/2014US8788774 Protecting data during different connectivity states
07/22/2014US8788773 Snapshot content metadata for application consistent backups
07/22/2014US8788772 Maintaining mirror and storage system copies of volumes at multiple remote sites
07/22/2014US8788771 Remote copy system
07/22/2014US8788770 Multiple cascaded backup process
07/22/2014US8788769 System and method for performing backup or restore operations utilizing difference information and timeline state information
07/22/2014US8788768 Maintaining mirror and storage system copies of volumes at multiple remote sites
07/22/2014US8788767 Register system and method for utilizing a register unit
07/22/2014US8788766 Software-accessible hardware support for determining set membership
07/22/2014US8788765 Buffer control system and method for a memory system having outstanding read and write request buffers
07/22/2014US8788764 Access controller for storage devices
07/22/2014US8788763 Protecting memory of a virtual guest
07/22/2014US8788762 Methods and apparatuses for data resource provision
07/22/2014US8788761 System and method for explicitly managing cache coherence
07/22/2014US8788760 Adaptive caching of data
07/22/2014US8788759 Double-buffered data storage to reduce prefetch generation stalls
07/22/2014US8788758 Least profitability used caching scheme
07/22/2014US8788756 Circuit for and method of enabling the transfer of data by an integrated circuit
07/22/2014US8788755 Mass data storage system and method of operating thereof
07/22/2014US8788754 Virtualized storage system and method of operating thereof
07/22/2014US8788753 Systems configured for improved storage system communication for N-way interconnectivity
07/22/2014US8788752 Storage apparatus, patrolling method and storage system
07/22/2014US8788750 Managing resources in cluster storage systems
07/22/2014US8788749 Implementing enhanced deterministic memory allocation for indirection tables for persistent media
07/22/2014US8788747 Independently controlled virtual memory devices in memory modules
07/22/2014US8788746 Information processing apparatus, image forming apparatus, data recovery method, and computer-readable recording medium
07/22/2014US8788745 Storage system comprising flash memory modules subject to two wear—leveling processes
07/22/2014US8788744 Memory control device
07/22/2014US8788743 Mapping between program states and data patterns
07/22/2014US8788742 Using an attribute of a write request to determine where to cache data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device
07/22/2014US8788741 Method and apparatus adapted to prevent code data from being lost in solder reflow
07/22/2014US8788740 Data commit on multicycle pass complete without error
07/22/2014US8788739 Hypervisor-based management of local and remote virtual memory pages
07/22/2014US8788732 Messaging network for processing data using multiple processor cores
07/22/2014US8788727 Electronic system subject to memory overflow condition
07/22/2014US8788717 Circuit device and a communication apparatus
07/22/2014US8788716 Wireless multimedia transport method and apparatus
07/22/2014US8788659 Playlist analytics
07/22/2014US8788648 Communication system and communication device
07/22/2014US8788581 Method and device for performing caching of dynamically generated objects in a data communication network
07/22/2014US8788537 Computer readable medium storing information processing program, information processing apparatus, and information processing method
07/22/2014US8788506 Methods and systems for estimating a count of unique items
07/22/2014US8788455 Disaster recovery
07/22/2014US8788071 Security for objects in a process plant configuration system
07/22/2014US8787935 Location request authorization for communication devices
07/22/2014US8787101 Stacked device remapping and repair
07/22/2014US8786891 Apparatus, method, and storage medium for transferring data to a buffer
07/22/2014US8786620 Discarding idle graphical display components from memory and processing
07/17/2014WO2014110535A1 Systems and methods of configuring a mode of operation in a solid-state memory
07/17/2014WO2014110140A1 Storage network data allocation
07/17/2014WO2014110111A1 Host controlled enablement of automatic background operations in a memory device
07/17/2014WO2014110095A1 Method and system for data storage
07/17/2014WO2014110088A1 Write once read many media methods and systems
07/17/2014WO2014110077A1 Data path integrity verification
07/17/2014WO2014110051A1 Enhanced dynamic memory management with intelligent current/power consumption minimization
07/17/2014WO2014109756A1 Page allocation for flash memories
07/17/2014WO2014108818A1 Real-time classification of data into data compression domains
07/17/2014WO2014108754A1 A method of establishing pre-fetch control information from an executable code and an associated nvm controller, a device, a processor system and computer program products
07/17/2014WO2014108749A1 Data processor and method for data processing
07/17/2014WO2014108743A1 A method and apparatus for using a cpu cache memory for non-cpu related tasks
07/17/2014WO2014082052A3 Scaling computing clusters
07/17/2014WO2014046974A3 Case secure computer architecture
07/17/2014WO2014031495A3 Translation look-aside buffer with prefetching
07/17/2014US20140201580 Systems and methods to update reference voltages in response to data retention in non-volatile memory
07/17/2014US20140201541 Secure online distributed data storage services
07/17/2014US20140201496 Reserving fixed areas in real storage increments
07/17/2014US20140201495 Page miss handler including wear leveling logic
07/17/2014US20140201494 Overlap checking for a translation lookaside buffer (tlb)
07/17/2014US20140201493 Optimizing large page processing
07/17/2014US20140201492 Efficient allocation and reclamation of thin-provisioned storage
07/17/2014US20140201491 Efficient allocation and reclamation of thin-provisioned storage
07/17/2014US20140201490 Method and system for dynamically changing page allocator
07/17/2014US20140201489 Method and apparatus for data reduction
07/17/2014US20140201481 Domain protection and virtualization for sata
07/17/2014US20140201478 De-Duplication Aware Secure Delete
07/17/2014US20140201477 Methods and apparatus to manage workload memory allocation
07/17/2014US20140201476 Event-based execution buffer management
07/17/2014US20140201474 On-disk multimap
07/17/2014US20140201473 Host controlled enablement of automatic background operations in a memory device
07/17/2014US20140201470 Shared op-symmetric update-sensitive variables
07/17/2014US20140201469 Shared op-symmetric update-sensitive variables
07/17/2014US20140201468 Accelerated recovery for snooped addresses in a coherent attached processor proxy
07/17/2014US20140201467 Epoch-based recovery for coherent attached processor proxy
07/17/2014US20140201466 Data recovery for coherent attached processor proxy
07/17/2014US20140201465 Accelerated recovery for snooped addresses in a coherent attached processor proxy
07/17/2014US20140201464 Epoch-based recovery for coherent attached processor proxy
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