Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
11/2012
11/29/2012US20120303928 Implementing enhanced deterministic memory allocation for indirection tables for persistent media
11/29/2012US20120303927 Memory allocation using power-of-two block sizes
11/29/2012US20120303926 Storage subsystem
11/29/2012US20120303925 Method and device for configuring memory capacity
11/29/2012US20120303924 Stochastic Processing
11/29/2012US20120303923 Capacity and load analysis using storage attributes
11/29/2012US20120303922 Implementing storage adapter performance optimization with enhanced resource pool allocation
11/29/2012US20120303921 Data processing circuit with multiplexed memory
11/29/2012US20120303920 Hard drive eraser
11/29/2012US20120303919 Write-erase endurance lifetime of memory storage devices
11/29/2012US20120303918 Defragmentation of data storage pools
11/29/2012US20120303917 Systems, methods, and physical computer storage media to optimize data placement in multi-tiered storage systems
11/29/2012US20120303916 Defragmentation of data storage pools
11/29/2012US20120303915 Transmission control device, memory control device, and plc including the transmission control device
11/29/2012US20120303914 Method and apparatus for backup and recovery using storage based journaling
11/29/2012US20120303913 Transparent file system migration to a new physical location
11/29/2012US20120303912 Storage account migration between storage stamps
11/29/2012US20120303911 Electronic device with reversing stack data container and related methods
11/29/2012US20120303910 Detecting Potential Access Errors In A Multi-Threaded Application
11/29/2012US20120303909 Implementing storage adapter performance optimization with enhanced hardware and software interface
11/29/2012US20120303908 Managing concurrent accesses to a cache
11/29/2012US20120303907 Dynamically Maintaining Coherency Within Live Ranges of Direct Buffers
11/29/2012US20120303906 Write-through-and-back-cache
11/29/2012US20120303905 Method and apparatus for implementing cache
11/29/2012US20120303904 Managing unmodified tracks maintained in both a first cache and a second cache
11/29/2012US20120303903 System, Method, and Computer Program Product for Modeling Changes to Large Scale Datasets
11/29/2012US20120303902 Apparatus and method for managing data storage
11/29/2012US20120303901 Distributed caching and analysis system and method
11/29/2012US20120303900 Processing pipeline control
11/29/2012US20120303899 Managing track discard requests to include in discard track messages
11/29/2012US20120303898 Managing unmodified tracks maintained in both a first cache and a second cache
11/29/2012US20120303897 Configurable set associative cache way architecture
11/29/2012US20120303896 Intelligent caching
11/29/2012US20120303895 Handling high priority requests in a sequential access storage device having a non-volatile storage cache
11/29/2012US20120303894 Transport agnostic scsi i/o referrals
11/29/2012US20120303893 Writing of data of a first block size in a raid array that stores and mirrors data in a second block size
11/29/2012US20120303892 Writing of new data of a first block size in a raid array that stores both parity and data in a second block size
11/29/2012US20120303891 Writing of data of a first block size in a raid array that stores and mirrors data in a second block size
11/29/2012US20120303890 Writing of new data of a first block size in a raid array that stores both parity and data in a second block size
11/29/2012US20120303889 SMR storage device with user controls and access to status information and parameter settings
11/29/2012US20120303887 Methods, systems, and computer readable media for caching and using scatter list metadata to control direct memory access (dma) receiving of network protocol data
11/29/2012US20120303886 Implementing storage adapter performance optimization with hardware chains to select performance path
11/29/2012US20120303885 Multiple processor system and method including multiple memory hub modules
11/29/2012US20120303884 Implementing enhanced updates for indirection tables
11/29/2012US20120303883 Implementing storage adapter performance optimization with cache data/directory mirroring
11/29/2012US20120303882 Usb memory device
11/29/2012US20120303881 Method and Memory Device that Powers-Up in a Read-Only Mode and Is Switchable to a Read/Write Mode
11/29/2012US20120303880 Method and apparatus for encrypting and processing data in flash translation layer
11/29/2012US20120303879 Memory Device and Method for Programming Flash Memory Utilizing Spare Blocks
11/29/2012US20120303878 Method and Controller for Identifying a Unit in a Solid State Memory Device for Writing Data to
11/29/2012US20120303877 Using an attribute of a write request to determine where to cache data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device
11/29/2012US20120303876 Caching data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device
11/29/2012US20120303875 Populating strides of tracks to demote from a first cache to a second cache
11/29/2012US20120303874 Information processing unit and information processing method
11/29/2012US20120303873 Method for storage devices to achieve low write amplification with low over provision
11/29/2012US20120303872 Cache management of tracks in a first cache and a second cache for a storage
11/29/2012US20120303871 Semiconductor memory device and method of controlling the same
11/29/2012US20120303870 Memory chip, memory system, and method of accessing the memory chip
11/29/2012US20120303869 Handling high priroity requests in a sequential access storage device having a non-volatile storage cache
11/29/2012US20120303868 Identifying a location containing invalid data in a storage media
11/29/2012US20120303867 Implementing enhanced epo protection for indirection data
11/29/2012US20120303866 Storage device with inline address indirection metadata storage
11/29/2012US20120303865 Write Operation with Immediate Local Destruction of Old Content in Non-Volatile Memory
11/29/2012US20120303864 Cache management of tracks in a first cache and a second cache for a storage
11/29/2012US20120303863 Using an attribute of a write request to determine where to cache data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device
11/29/2012US20120303862 Caching data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device
11/29/2012US20120303861 Populating strides of tracks to demote from a first cache to a second cache
11/29/2012US20120303860 Method and Controller for Identifying a Unit in a Solid State Memory Device for Writing Data To
11/29/2012US20120303859 Implementing storage adapter performance optimization with parity update footprint mirroring
11/29/2012US20120303858 Adjusting available persistent storage during execution in a virtual computer system
11/29/2012US20120303857 Checkpointed Tag Prefetcher
11/29/2012US20120303685 Systems and methods for storing parity groups
11/29/2012US20120303533 System and method for securing, distributing and enforcing for-hire vehicle operating parameters
11/29/2012US20120300931 Method and Apparatus for Securing Data in a Memory Device
11/29/2012US20120299935 Processing order with integer inputs and floating point inputs
11/29/2012DE202012007252U1 Vorrichtung für TLB-Shootdown in einem gemeinsam genutzten virtuellen Speicher unterstützenden, heterogenen Rechensystem Apparatus for TLB shootdown in a shared virtual memory support, heterogeneous computing system
11/29/2012DE112011100564T5 Einfügen eines Flash-Zwischenspeichers in große Speichersysteme Insert a flash cache in large storage systems
11/29/2012DE112004002832B4 Sektorschutzschaltung für einen nichtflüchtigen Halbleiterspeicher, Sektorschutzverfahren und Halbleitervorrichtung Sector protection circuit for a nonvolatile semiconductor memory sector protection method and semiconductor device
11/29/2012DE10341563B4 Kohärenzsteuerung für eine Cache-Speicherstruktur Consistency control for a cache memory structure
11/29/2012DE102012103655A1 Schreiben neuer Daten einer ersten Blockgröße in einen RAID-Array, der sowohl die Parität als auch die Daten in einer zweiten Blockgröße speichert Writing new data to a first block size in a RAID array that stores both the parity and the data in a second block size
11/29/2012DE102008055504B4 Verfahren zur Steuerung der Wiedergabe von in einem Speicher mit wahlfreiem Zugriff gespeicherten Signalen Method for controlling the reproduction of signals stored in a memory with random access
11/28/2012EP2528011A1 Method and system for allowing access to developed applications via a multi-tenant on-demand database service
11/28/2012EP2527991A1 Analysis method, analysis device, and analysis program
11/28/2012EP2527987A1 Apparatus and methods to reduce castouts in a multi-level cache hierarchy
11/28/2012EP2527986A1 Information processing apparatus, drive control program and drive control method
11/28/2012EP2526493A2 Adaptively time-multiplexing memory references from multiple processor cores
11/28/2012EP2526477A1 Memory controller
11/28/2012CN202563494U Consistency maintenance device for multi-core processor
11/28/2012CN1641645B Systems and methods for controlling a visible results set
11/28/2012CN1542637B Method and system for synchronizing data shared among peer computing devices
11/28/2012CN1534953B Method and apparatus for controlling external device
11/28/2012CN102804277A Programming Reversible Resistance Switching Elements
11/28/2012CN102804155A Delegating a poll operation to another device
11/28/2012CN102804153A Storing secure mode page table data in secure and non-secure regions of memory
11/28/2012CN102804152A Cache coherent support for flash in a memory hierarchy
11/28/2012CN102804151A Memory agent to access memory blade as part of the cache coherency domain
11/28/2012CN102804150A Data processing device, data processing method, and data sharing system
11/28/2012CN102804149A Multi-core processor system, arbitration circuit control method, and arbitration circuit control program
11/28/2012CN102804148A Latch timing adjustment apparatus and memory access system using sam
11/28/2012CN102799819A Embedded software safety protection system
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