| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 07/12/2000 | CN1054457C Memory storage for semiconductor and mfg. method thereof |
| 07/11/2000 | US6088817 Fault tolerant queue system |
| 07/11/2000 | US6088789 Prefetch instruction specifying destination functional unit and read/write access mode |
| 07/11/2000 | US6088780 Page table walker that uses at least one of a default page size and a page size selected for a virtual address space to position a sliding field in a virtual address |
| 07/11/2000 | US6088779 System and method for execution management of computer programs |
| 07/11/2000 | US6088778 Method for manipulating disk partitions |
| 07/11/2000 | US6088777 Memory system and method for dynamically allocating a memory divided into plural classes with different block sizes to store variable length messages |
| 07/11/2000 | US6088776 Burst clock memory circuit |
| 07/11/2000 | US6088773 Checkpoint acquisition accelerating apparatus |
| 07/11/2000 | US6088770 Shared memory multiprocessor performing cache coherency |
| 07/11/2000 | US6088769 Multiprocessor cache coherence directed by combined local and global tables |
| 07/11/2000 | US6088768 Method and system for maintaining cache coherence in a multiprocessor-multicache environment having unordered communication |
| 07/11/2000 | US6088767 Fileserver buffer manager based on file access operation statistics |
| 07/11/2000 | US6088765 Removable medium data storage apparatus, optical disk apparatus and data transfer control method |
| 07/11/2000 | US6088764 Method and apparatus for reducing space allocation failures in storage management systems |
| 07/11/2000 | US6088763 Method and apparatus for translating an effective address to a real address within a cache memory |
| 07/11/2000 | US6088762 Power failure mode for a memory controller |
| 07/11/2000 | US6088760 Addressing system in a multi-port RAM having main and cache memories |
| 07/11/2000 | US6088759 Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture |
| 07/11/2000 | US6088758 Method and apparatus for distributing data in a digital data processor with distributed memory |
| 07/11/2000 | US6088743 Processor receiving response request corresponding to access clock signal with buffer for external transfer synchronous to response request and internal transfer synchronous to operational clock |
| 07/11/2000 | US6088736 Joint flow control mechanism in a telecommunications network |
| 07/11/2000 | US6088706 System and method for managing replicated data by merging the retrieved records to generate a sequence of modifications |
| 07/11/2000 | US6088704 Parallel management system for a file data storage structure |
| 07/11/2000 | US6088515 Method and apparatus for making a hypermedium interactive |
| 07/11/2000 | US6088450 Authentication system based on periodic challenge/response protocol |
| 07/11/2000 | US6088340 Method and apparatus in a wireless communication system for controlling a display of template data by a protable subscriber unit |
| 07/11/2000 | US6088280 High-speed memory arranged for operating synchronously with a microprocessor |
| 07/11/2000 | US6088262 Semiconductor device and electronic equipment having a non-volatile memory with a security function |
| 07/11/2000 | US6088182 Recording medium cartridge recording/reproducing apparatus using a recording medium cartridge and information management system |
| 07/11/2000 | US6088045 High definition multimedia display |
| 07/11/2000 | CA2212354C Method for heap management of fixed sized objects using pages |
| 07/11/2000 | CA2043293C Database network management process |
| 07/06/2000 | WO2000039941A1 Interleaving / deinterleaving device and method for communication system |
| 07/06/2000 | WO2000039800A1 Information processing device and method, and program storage medium |
| 07/06/2000 | WO2000039764A1 A dual-ported pipelined two level cache system |
| 07/06/2000 | WO2000039709A1 Query processing method |
| 07/06/2000 | WO2000039702A2 System and method for browsing and comparing products |
| 07/06/2000 | WO2000039698A1 Client-server dynamic file access system and method |
| 07/06/2000 | WO2000039692A1 Method and apparatus for data capture in a memory device |
| 07/06/2000 | WO2000039691A1 Data storage system |
| 07/06/2000 | WO2000039690A1 Data storage system |
| 07/06/2000 | WO2000039688A1 Backup memory managing device, backup memory managing method, game machine, and recorded medium |
| 07/06/2000 | WO2000039687A1 Recoverable methods and systems for processing input/output requests including virtual memory addresses |
| 07/06/2000 | WO2000039686A1 Speculative cache line write backs to avoid hotspots |
| 07/06/2000 | WO2000039685A1 Flexible memory channel |
| 07/06/2000 | WO2000039679A2 Method and apparatus for balancing workloads among paths in a multi-path computer system |
| 07/06/2000 | WO2000039666A1 Converting content of markup data for wireless devices |
| 07/06/2000 | WO2000028440B1 Systems and methods for interoperable multimedia content descriptions |
| 07/06/2000 | DE19962192A1 Verfahren und System zur Inhaltskonvertierung von elektronischen Daten für drahtlose Vorrichtungen Method and system for converting content of electronic data for wireless devices |
| 07/06/2000 | DE19960977A1 Data achiving system with access check on data recall, has third party acting as manager |
| 07/06/2000 | CA2358108A1 Client-server dynamic file access system and method |
| 07/06/2000 | CA2353932A1 System and method for browsing and comparing products |
| 07/06/2000 | CA2320891A1 Query processing method |
| 07/06/2000 | CA2293938A1 Memory pool control circuit and memory pool control method |
| 07/05/2000 | EP1017223A2 System for authenticating digital data |
| 07/05/2000 | EP1017050A2 Digital signal storage |
| 07/05/2000 | EP1016990A2 Complex digital content managing method and complex digital content system |
| 07/05/2000 | EP1016979A2 Multiprocessor digital data processing system |
| 07/05/2000 | EP1016978A2 Packet routing switch |
| 07/05/2000 | EP1016977A2 Packet routing switch |
| 07/05/2000 | EP1016971A2 Multiprocessor digital data processing system |
| 07/05/2000 | EP1016970A2 A memory architecture for parallel data access along any given dimension of an n-dimensional rectangular data array |
| 07/05/2000 | EP1016967A2 Multiple drive failure tolerant RAID method and apparatus |
| 07/05/2000 | EP1016962A2 Prioritized data and instruction fetch |
| 07/05/2000 | EP1016949A1 Method and system for preventing illegal use of digital contents, processing program thereof, and recording medium for the program |
| 07/05/2000 | EP1016068A1 Pixel reordering for improved texture mapping |
| 07/05/2000 | EP1016005A2 Method for transaction within a distributed database |
| 07/05/2000 | EP1015989A1 Multi-port internally cached drams |
| 07/05/2000 | EP1015983A1 Data sharing method and computer architecture |
| 07/05/2000 | EP1015980A1 A data cache capable of performing store accesses in a single clock cycle |
| 07/05/2000 | EP1015976A1 Data transfer to a non-volatile storage medium |
| 07/05/2000 | EP1015975A2 Method and device for monitoring an automatic process to ensure that it is executed correctly |
| 07/05/2000 | EP1015973A1 Log based data architecture for a transactional message queuing system |
| 07/05/2000 | EP1015951A1 Secure enablement of a processing entity |
| 07/05/2000 | EP1014821A1 Toe and metatarsal protectors for safety footwear |
| 07/05/2000 | EP0853790A4 Flash eeprom main memory in a computer system |
| 07/05/2000 | EP0748481A4 Highly pipelined bus architecture |
| 07/05/2000 | CN1259218A Rollup certification in a reader |
| 07/05/2000 | CN1054224C Method and system for enhanced efficiency of data transfers from memory to multiple processors in a data processing system |
| 07/05/2000 | CN1054223C System and method for synchronization in split-level data cache system |
| 07/04/2000 | US6085330 Control circuit for switching a processor between multiple low power states to allow cache snoops |
| 07/04/2000 | US6085300 DRAM system with simultaneous burst read and write |
| 07/04/2000 | US6085299 Secure updating of non-volatile memory |
| 07/04/2000 | US6085298 Comparing mass storage devices through digests that are representative of stored data in order to minimize data transfer |
| 07/04/2000 | US6085297 Single-chip memory system including buffer |
| 07/04/2000 | US6085296 Sharing memory pages and page tables among computer processes |
| 07/04/2000 | US6085295 Method of maintaining data coherency in a computer system having a plurality of interconnected nodes |
| 07/04/2000 | US6085294 Distributed data dependency stall mechanism |
| 07/04/2000 | US6085293 Non-uniform memory access (NUMA) data processing system that decreases latency by expediting rerun requests |
| 07/04/2000 | US6085292 Apparatus and method for providing non-blocking pipelined cache |
| 07/04/2000 | US6085291 System and method for selectively controlling fetching and prefetching of data to a processor |
| 07/04/2000 | US6085290 Method of and apparatus for validating data read out of a multi port internally cached dynamic random access memory (AMPIC DRAM) |
| 07/04/2000 | US6085289 Method and system for load data formatting and improved method for cache line organization |
| 07/04/2000 | US6085288 Dual cache directories with respective queue independently executing its content and allowing staggered write operations |
| 07/04/2000 | US6085287 Method and apparatus for enhancing the disk cache process by dynamically sizing prefetch data associated with read requests based upon the current cache hit rate |
| 07/04/2000 | US6085286 Cache control method and apparatus |
| 07/04/2000 | US6085284 Method of operating a memory device having a variable data output length and an identification register |
| 07/04/2000 | US6085282 Method and apparatus for distinguishing register reads from memory reads in a flash memory |
| 07/04/2000 | US6085263 Method and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processor |