Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
10/2003
10/15/2003EP0839354B1 Memory structure
10/15/2003EP0748481B1 Highly pipelined bus architecture
10/15/2003CN1449532A Method for distributing position information
10/15/2003CN1449531A Data compiling method
10/15/2003CN1449530A Transactional file system
10/15/2003CN1449515A Method of detecting malicious code
10/15/2003CN1448866A Web page providing method and apparatus and program
10/15/2003CN1448857A Electronic document management method and program
10/15/2003CN1448851A Virtual private network applying hardware encipher/decipher
10/15/2003CN1448850A Method and apparatus for safety protection of digital processing unit
10/15/2003CN1448849A System chip structure and operating method having no waiting period
10/15/2003CN1448848A Memory control method realized by lifting wavelet fast algorithm VLSI
10/15/2003CN1448847A Universal serial bus structural flash memory device
10/15/2003CN1448844A Semiconductor integrated circuit with security function
10/15/2003CN1448827A Method and apparatus for verifying data in a storage system
10/15/2003CN1124751C Automatic data service selection
10/15/2003CN1124550C Permit for controlling access to services in protected memory
10/15/2003CN1124548C Recording/reproducing apparatus
10/15/2003CN1124534C Content supplied as software objects for copyright protection
10/15/2003CA2381739A1 Adaptive spin latches
10/14/2003US6634010 ASIC design support system
10/14/2003US6634004 Threshold analysis system capable of deciding all threshold voltages included in memory device through single processing
10/14/2003US6633999 Integrated circuit with on-chip data checking resources
10/14/2003US6633984 Techniques for permitting access across a context barrier on a small footprint device using an entry point object
10/14/2003US6633968 Pre-fetching of pages prior to a hard page fault sequence
10/14/2003US6633967 Coherent translation look-aside buffer
10/14/2003US6633966 FIFO memory having reduced scale
10/14/2003US6633965 Memory controller with 1×/M× read capability
10/14/2003US6633964 Method and system using a virtual lock for boot block flash
10/14/2003US6633963 Controlling access to multiple memory zones in an isolated execution environment
10/14/2003US6633962 Method, system, program, and data structures for restricting host access to a storage space
10/14/2003US6633960 Scalable directory based cache coherence protocol
10/14/2003US6633959 Non-uniform memory access (NUMA) data processing system that provides notification of remote deallocation of shared data
10/14/2003US6633958 Multiprocessor computer system and method for maintaining cache coherence utilizing a multi-dimensional cache coherence directory structure
10/14/2003US6633957 Maximizing sequential read streams while minimizing the impact on cache and other applications
10/14/2003US6633956 Memory card with task registers storing physical addresses
10/14/2003US6633955 Four way support for dynamic mirror service policy
10/14/2003US6633954 Method for enhancing host application performance with a DASD using task priorities
10/14/2003US6633949 Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture
10/14/2003US6633948 Stackable dual mode (registered/unbuffered) memory interface cost reduction
10/14/2003US6633947 Memory expansion channel for propagation of control and request packets
10/14/2003US6633938 Independent reset of arbiters and agents to allow for delayed agent reset
10/14/2003US6633927 Device and method to minimize data latency and maximize data throughput using multiple data valid signals
10/14/2003US6633915 Personal information management apparatus and customizing apparatus
10/14/2003US6633910 Method and apparatus for enabling real time monitoring and notification of data updates for WEB-based data synchronization services
10/14/2003US6633904 Fast data exchange system between different type computer and medium storing program of extent information and transformation
10/14/2003US6633891 Managing replacement of data in a cache on a node based on caches of other nodes
10/14/2003US6633887 Information management apparatus dividing files into paragraph information and header information linked to the paragraph information and recording medium thereof
10/14/2003US6633853 Recordable optical disk encrypted with disk identification and multiple keys
10/14/2003US6633807 Enhanced module chipping system
10/14/2003US6633724 Realtime data recording method
10/14/2003US6633652 Method of inserting a watermark and authenticating a digital signal
10/14/2003US6633504 Synchronous DRAM having test mode in which automatic refresh is performed according to external address and automatic refresh method
10/14/2003US6633502 Test device for semiconductor memory circuit
10/14/2003US6633501 Integrated circuit and circuit configuration for supplying power to an integrated circuit
10/14/2003US6633299 Method and apparatus for implementing smart allocation policies for a small frame buffer cache serving 3D and 2D streams
10/14/2003US6631967 Printer and ink cartridge attached thereto
10/09/2003WO2003084125A1 Content processing device, content accumulation medium, content processing method, and content processing program
10/09/2003WO2003083719A2 Life-cycle management engine
10/09/2003WO2003083684A1 Method and apparatus for synchronizing how data is stored in different data stores
10/09/2003WO2003083678A1 Access control apparatus and data management apparatus
10/09/2003WO2003083675A1 File management system and file management method
10/09/2003WO2003083673A1 Method and apparatus for improved security in a data processor
10/09/2003WO2003083672A1 System and method providing region-granular, hardware-controlled memory encryption
10/09/2003WO2003083671A1 Input/output permission bitmaps for compartmentalized security
10/09/2003WO2003083670A1 Protection of data by hiding the data
10/09/2003WO2003083669A2 Inexact addressable digital memory
10/09/2003WO2003083668A1 Morphing memory pools
10/09/2003WO2003083667A1 System and method for full wireless synchronization of a data processing apparatus with a data service
10/09/2003WO2003083666A1 System and method for prefetching to a shared memory by a plurality of processors
10/09/2003WO2003083665A2 Obtaining data mask mapping information
10/09/2003WO2003083663A2 Use of context identifiers in cache memory
10/09/2003WO2003083661A1 Memory-access management method and system for synchronous dynamic random-access memory or the like
10/09/2003WO2003083656A2 Method and apparatus for context switching in computer operating systems
10/09/2003WO2003083638A2 Data storage system
10/09/2003WO2003083628A2 System and method for controlling device-to-device accesses within a computer system
10/09/2003WO2003083597A2 Collapsed distributed cooperative memory for interactive and scalable media-on-demand systems
10/09/2003WO2003054724A3 File identification system and method
10/09/2003WO2003050655A3 Direct memory access (dma) transfer buffer processor
10/09/2003WO2003038623A3 Processor-memory system
10/09/2003WO2003007156A3 Mechanism for programmable modification of memory mapping granularity
10/09/2003WO2002093385A3 Method and system for speculatively invalidating lines in a cache
10/09/2003WO2002071261A3 Virtual databank objects
10/09/2003WO2002062054A3 Initial viewing period for authorization of multimedia content
10/09/2003WO2002056181A3 File switch and switched file system
10/09/2003WO2002052389A3 Anti-cloning method
10/09/2003WO2002037246A3 System and method for using location identity to control access to digital information
10/09/2003WO2002017079A3 Gathering enriched web server activity data of cached web content
10/09/2003US20030191983 Loosely coupled mass storage computer cluster
10/09/2003US20030191954 Information recording device and information reproducing device
10/09/2003US20030191927 Multiple-thread processor with in-pipeline, thread selectable storage
10/09/2003US20030191922 Method and system for local memory addressing in single instruction, multiple data computer system
10/09/2003US20030191921 High speed selective mirroring of cached data
10/09/2003US20030191919 Volume management method and apparatus
10/09/2003US20030191918 Data processing arrangement and method
10/09/2003US20030191916 Apparatus and method of cascading backup logical volume mirrors
10/09/2003US20030191915 Method, system, and apparatus for reducing power consumption of a memory
10/09/2003US20030191913 Tracking memory page state
10/09/2003US20030191911 Using disassociated images for computer and storage resource management
10/09/2003US20030191910 Disk storage system including a switch
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