Patents
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
07/1997
07/02/1997EP0507026B1 A process for storing files of an electronic system
07/02/1997CN1153576A Operating device with analog joystick
07/02/1997CN1153348A Flag setting circuit for microprocessor
07/02/1997CN1153347A Bus analyzer and method for testing inner bus thereof
07/01/1997US5644767 Method and apparatus for determining and maintaining drive status from codes written to disk drives of an arrayed storage subsystem
07/01/1997US5644756 Integrated circuit data processor with selectable routing of data accesses
07/01/1997US5644742 Processor structure and method for a time-out checkpoint
07/01/1997US5644717 System for generating local area network operating statistics based on monitored network traffic and method therefor
07/01/1997US5644709 Method for detecting computer memory access errors
07/01/1997US5644708 Method and device to control a memory
07/01/1997US5644707 Computer mainframe signal monitoring system
07/01/1997US5644706 Failure detection and reporting for a computer mail gateway
07/01/1997US5644705 Method and apparatus for addressing and testing more than two ATA/IDE disk drive assemblies using an ISA bus
07/01/1997US5644703 Emulation system
07/01/1997US5644701 Data processing system and method for executing snapshot dumps
07/01/1997US5644700 Method for operating redundant master I/O controllers
07/01/1997US5644699 Memory apparatus and data processor using the same
07/01/1997US5644698 In a data processing system
07/01/1997US5644697 Redundant array of disks with improved storage and recovery speed
07/01/1997US5644696 Recovering multi-volume data sets during volume recovery
07/01/1997US5644695 Array combinatorial decoding with multiple error and erasure detection and location using cyclic equivalence testing
07/01/1997US5644618 Method of self-diagnosing a mobile telephone set for use in a mobile telephone switching system and a mobile telephone set to which the method is applied
07/01/1997US5644594 Power-conserving modem
07/01/1997US5644583 Soft error correction technique and system for odd weight row error correction codes
07/01/1997US5644569 Transmission of messages
07/01/1997US5644515 Hardware logic emulation system capable of probing internal nodes in a circuit design undergoing emulation
06/1997
06/26/1997WO1997022931A1 A method and apparatus for management of faulty data in a raid system
06/26/1997WO1997022930A1 Transparent fault tolerant computer system
06/26/1997WO1997022929A1 Processor independent error checking arrangement
06/26/1997WO1997022885A1 High impedance test mode for jtag
06/26/1997DE4341510C2 Vorrichtungen und Verfahren zum Beheben von Fehlern für ein Subsystem mit Verwendung von Magnetbandeinheiten Devices and methods to solve problems for a subsystem with use of magnetic tape units
06/26/1997DE19630746A1 Associative memory circuit device, e.g. content addressable memory
06/26/1997CA2240412A1 A method and apparatus for management of faulty data in a raid system
06/25/1997EP0780774A1 Logical address bus architecture for multiple processor systems
06/25/1997EP0780767A2 Method and apparatus for pseudorandom boundary-scan testing
06/25/1997EP0780765A2 Data processing apparatus and method for the replacement of failed storage devices
06/25/1997EP0780001A1 Control of transitions between power management states in a computer system
06/25/1997EP0680635B1 Method and apparatus for data transfer and storage in a highly parallel computer network environment
06/25/1997EP0623230B1 Fault tolerant computer system with provision for handling external events
06/25/1997EP0549677B1 Network management system using model-based intelligence
06/25/1997EP0541991B1 Fault indication in a storage device array
06/25/1997CN1152782A Circuit for producing scan path
06/24/1997US5642517 Personal computer
06/24/1997US5642514 Method and system for constructing compact executable files by eliminating redundant debugging strings
06/24/1997US5642507 Apparatus for collecting control data of a virtual machine and method of thereof
06/24/1997US5642505 Backup, restoration, migration systems of a database
06/24/1997US5642504 Method of testing an application on a server which accesses a database
06/24/1997US5642499 Method and apparatus for controlling timing of execution of saving and restoring operations in a processor system
06/24/1997US5642496 Method of making a backup copy of a memory over a plurality of copying sessions
06/24/1997US5642479 Trace analysis of data processing
06/24/1997US5642478 Distributed trace data acquisition system
06/24/1997US5642472 Software discovery system
06/24/1997US5642359 Multiplexing device for a redundant channel bus
06/24/1997US5642307 Die identifier and die indentification method
06/24/1997US5642069 Clock signal loss detection and recovery apparatus in multiple clock signal system
06/24/1997US5642057 Testable embedded microprocessor and method of testing same
06/23/1997CA2192867A1 Method and apparatus for pseudorandom boundary-scan testing
06/21/1997CA2193343A1 Computer system data i/o by reference among multiple cpus
06/21/1997CA2193342A1 Computer system data i/o by reference among multiple cpus
06/21/1997CA2193341A1 Computer system data i/o by reference among multiple data sources and sinks
06/20/1997CA2193282A1 A method generating digital tokens from a subset of addressee information
06/19/1997WO1997022208A2 Providing access to services in a telecommunications system
06/19/1997WO1997022054A2 Processor redundancy in a distributed system
06/19/1997WO1997022053A1 Error detection and correction system for use with address translation memory controller
06/19/1997WO1997022052A1 Methods and systems for reconstructing the state of a computation
06/19/1997WO1997022046A2 Remote checkpoint memory system and protocol for fault-tolerant computer system
06/19/1997WO1997022045A2 Main memory system and checkpointing protocol for fault-tolerant computer system using a read buffer
06/19/1997WO1997022044A2 Data-archiving system and process information system for a power station
06/19/1997WO1997022013A1 Jtag testing of buses using plug-in cards with jtag logic mounted thereon
06/18/1997EP0779580A1 Process for the automation of informatic procedures and device therefor
06/18/1997EP0779579A2 Bus error handler on dual bus system
06/18/1997EP0584512B1 Method for time-monitoring program execution
06/18/1997EP0540450B1 ECC function with self-contained high performance partial write or read/modify/write and parity look-ahead interface scheme
06/18/1997EP0477123B1 A method of managing unit-of-work identifiers in a distributed transaction processing system
06/18/1997EP0476262B1 Error handling in a VLSI central processor unit employing a pipelined address and execution module
06/18/1997EP0441090B1 Computer controlled optimized pairing of disk units
06/17/1997US5640608 System and method for block generation of monotonic globally unique tag values, where restart tag value due to failure starts at highest value of previously generated tag values
06/17/1997US5640604 Buffer reallocation system
06/17/1997US5640600 Storage controller and bus control method for use therewith
06/17/1997US5640561 Computerized method and system for replicating a database using log records
06/17/1997US5640558 Identifying and analyzing multiple level class relationships in an object oriented system by parsing source code without compilation
06/17/1997US5640542 On-chip in-circuit-emulator memory mapping and breakpoint register modules
06/17/1997US5640537 Apparatus for causing a computer system to respond to emulated user interaction in the absence of actual user interaction
06/17/1997US5640530 Data processing system
06/17/1997US5640524 Method and apparatus for chaining vector instructions
06/17/1997US5640514 Synchronization method for automation systems
06/17/1997US5640513 Method of operating a software network
06/17/1997US5640511 Method of arbitrating access to a data bus and apparatus therefor
06/17/1997US5640508 Fault detecting apparatus for a microprocessor system
06/17/1997US5640506 Integrity protection for parity calculation for raid parity cache
06/17/1997US5640504 Distributed computing network
06/17/1997US5640503 Method and apparatus for verifying a target instruction before execution of the target instruction using a test operation instruction which identifies the target instruction
06/17/1997US5640500 Computer program product for enabling a computer to construct displays of partially ordered data
06/17/1997US5640337 Method and apparatus for interim in-situ testing of an electronic system with an inchoate ASIC
06/17/1997US5640140 Alarm processing apparatus
06/17/1997US5640105 Current mode null convention threshold gate
06/17/1997CA2074750C Method and apparatus for programmable memory control with error regulation and test functions
06/12/1997WO1997021204A1 Display device for a programmable controller
06/12/1997WO1997021172A1 Data integrity and cross-check code with logical block address
06/12/1997WO1997018505A3 Method and arrangement for operating a mass memory storage peripheral computer device connected to a host computer