Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 11 - Error detection; Error correction; Monitoring
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
10/2003
10/16/2003WO2003001360A3 First-in, first-out memory system and method thereof
10/16/2003WO2002097624A3 Recovery computer for a plurality of networked computers
10/16/2003WO2002095586A3 Hierarchical built-in self-test for system-on-chip design
10/16/2003WO2002073410A3 System and method for synchronizing a data copy using an accumulation remote copy trio
10/16/2003WO2002067529A3 System and method for accessing a storage area network as network attached storage
10/16/2003WO2002037340A3 System and method for test generation with dynamic constraints using static analysis
10/16/2003WO2002033570A3 Digital signal processing apparatus
10/16/2003US20030196193 Mechanism for profiling computer code
10/16/2003US20030196192 Dynamic generation of program execution trace files in a standard markup language
10/16/2003US20030196191 Recursive use of model based test generation for middlevare validation
10/16/2003US20030196190 Generating and managing test plans for testing computer software
10/16/2003US20030196189 System and method Xlet and applet manager testing
10/16/2003US20030196188 Mechanism for generating an execution log and coverage data for a set of computer code
10/16/2003US20030196170 Method and system for computer based testing using a non-deterministic exam extensible language (XXL) protocol
10/16/2003US20030196157 ECC block encoder and decoder with reduced RAM memory requirement
10/16/2003US20030196147 Storage apparatus and control method thereof
10/16/2003US20030196146 Systems and methods for testing processors
10/16/2003US20030196145 Operating system and data protection
10/16/2003US20030196144 Processor condition sensing circuits, systems and methods
10/16/2003US20030196143 Power-on state machine implementation with a counter to control the scan for products with hard-BISR memories
10/16/2003US20030196142 Transparent software emulation as an alternative to hardware bus lock
10/16/2003US20030196141 Hierarchy of fault isolation timers
10/16/2003US20030196140 Semiconductor integrated circuit
10/16/2003US20030196138 Method and system of backing up data
10/16/2003US20030196137 Fault tolerant sleep mode of operation
10/16/2003US20030196136 Remote administration in a distributed system
10/16/2003US20030196134 Apparatus and system for recovery of useful areas of partially defective direct rambus RIMM components
10/16/2003US20030196133 Method and apparatus of recording data in the optical recording medium
10/16/2003US20030196053 Method and apparatus for copying data from a main site to a remote site
10/16/2003US20030196052 Method, system, and program for grouping objects
10/16/2003US20030196051 Method for managing data stored primarily in a read-only memory
10/16/2003US20030196025 Synchronizing processing of commands invoked against duplexed coupling facility structures
10/16/2003US20030196023 Data redundancy methods and apparatus
10/16/2003US20030196008 Method and apparatus for checking the state of peripherals
10/16/2003US20030196002 Storage subsystem and storage controller
10/16/2003US20030195960 System, method, and program for measuring performance in a network system
10/16/2003US20030195959 Framework for managing data that provides correlation information in a distributed computing system
10/16/2003US20030195955 Method and system for selecting a cluster owner based on one or more risk factors of the candidates
10/16/2003US20030195903 System and method for asynchronous mirroring of snapshots at a destination using a purgatory directory and inode mapping
10/16/2003US20030195732 Specifying and targeting portions of a graphical program for real-time response
10/16/2003US20030195731 Graphical program with various function icons and method for conversion into a hardware implementation
10/16/2003US20030195730 Graphical program having a timing specification and method for conversion into a hardware implementation
10/16/2003US20030195729 Specifying and targeting portions of a graphical program for execution by multiple targets
10/16/2003US20030195718 Method and device for machinery diagnostics and prognostics
10/16/2003US20030195717 Time and work tracker for servers
10/16/2003US20030195716 Interface device for product testing
10/16/2003US20030195715 Automatic test vector generation method, test method making use of the test vectors as automatically generated, chip manufacturing method and automatic test vector generation program
10/16/2003US20030195711 Apparatus for processing items of electronic equipment
10/16/2003US20030194027 Partial response maximum likelihood (PRML) bit detection apparatus
10/15/2003EP1353274A2 Mechanism for generating an execution log and coverage data for a set of computer code
10/15/2003EP1353273A2 Recovery of data on a primary data volume
10/15/2003EP1353272A2 Improved carryout word calculation for cyclic shift registers
10/15/2003EP1353271A2 Controller with fail-safe function
10/15/2003EP1352501A2 Method and apparatus for firewall traversal
10/15/2003EP1352345A2 A system and method for verifying logical, arithmetic and timing dependencies of system behaviors using constraint calculus analysis
10/15/2003EP1352343A2 A system and method for data synchronization between remote devices
10/15/2003EP1352335A1 Method and system for implementing ospf redundancy
10/15/2003EP1352332A1 Liveexception system
10/15/2003EP1352327A2 Method and apparatus for predicting failure in a system
10/15/2003EP1352326A2 Method and device for monitoring a data processing and transmission
10/15/2003EP1352325A1 Method for error injection by interruptions
10/15/2003EP1352324A1 Fault-tolerant synchronisation device for a real-time computer network
10/15/2003EP1352305A2 System and method for preventing software piracy
10/15/2003EP1282859B1 Peripheral component with high error protection for memory programmable command apparatuses
10/15/2003EP1173853B1 Failure capture apparatus and method for automatic test equipment
10/15/2003EP1116127B1 Program-controlled unit
10/15/2003EP0966708B1 Method for identifying validity of an executable file description
10/15/2003EP0835485B1 Network board which responds to status changes of its installed peripheral by generating a testpage
10/15/2003EP0729098B1 Information storage controller
10/15/2003CN1449613A A modulation technique providing high data rate through band limited channels
10/15/2003CN1449515A Method of detecting malicious code
10/15/2003CN1449511A Multi-variable matrix process control
10/15/2003CN1449152A Error correction with two block codes
10/15/2003CN1449120A Carryout word calculation for cyclic shift registers which shift multiple bits at the same time
10/15/2003CN1448859A Duplexed processor system
10/15/2003CN1448846A Intelligent network-switching equipment having common same user output-input interface
10/15/2003CN1448845A Method and apparatus for adjusting execution performance adapted for electronic installation
10/15/2003CN1448827A Method and apparatus for verifying data in a storage system
10/15/2003CA2381737A1 Framework for managing data that provides correlation information in a distributed computing system
10/14/2003US6634026 Method and apparatus for correcting common errors in multiple versions of a computer program
10/14/2003US6634020 Uninitialized memory watch
10/14/2003US6634017 System LSI development apparatus and the method thereof for developing a system optimal to an application
10/14/2003US6634005 System and method for testing an interface between two digital integrated circuits
10/14/2003US6634004 Threshold analysis system capable of deciding all threshold voltages included in memory device through single processing
10/14/2003US6634001 Remote monitoring of computer programs
10/14/2003US6634000 Analyzing fault logs and continuous data for diagnostics for a locomotive
10/14/2003US6633999 Integrated circuit with on-chip data checking resources
10/14/2003US6633997 System for automatically restoring trouble, method and storage medium
10/14/2003US6633996 Fault-tolerant maintenance bus architecture
10/14/2003US6633973 Trace control circuit adapted for high-speed microcomputer operation
10/14/2003US6633955 Four way support for dynamic mirror service policy
10/14/2003US6633891 Managing replacement of data in a cache on a node based on caches of other nodes
10/14/2003US6633861 Automatic invocation of computational resources without user intervention across a network
10/14/2003US6633838 Multi-state logic analyzer integral to a microprocessor
10/14/2003US6633506 Antifuse detection circuit
10/14/2003US6633502 Test device for semiconductor memory circuit
10/14/2003CA2120333C Multiple-fail-operational fault tolerant clock
10/12/2003CA2381605A1 Dynamic generation of program execution trace files in a standard markup language
10/12/2003CA2381596A1 Generating and managing test plans for testing computer software
10/09/2003WO2003084116A1 Transparent consistent semi-active and passive replication of multithreaded application programs
1 ... 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 ... 1404